quartus II :Error: Waveform2.vwf.vt(30): near “,“: syntax error, unexpected ‘,‘ # ** Error

created at 12-31-2021 views: 25


When using quartus to design a 4-divider based on D flip-flop, the following error occurred during waveform simulation:

Error: Waveform2.vwf.vt(30): near ",": syntax error, unexpected ','
# ** Error: D:/Quartus/modelsim_ase/win32aloem/vlog failed.
# Executing ONERROR command at macro ./D4.do line 4



In the schematic design, my input and output ports are named: input, output. The mistake is here, we just need to name it something else. For example: CLKIN, out. Then recompile, and then the simulation will not report an error. The correct simulation diagram is as follows:


created at:12-31-2021
edited at: 12-31-2021: